CCS C Software and Maintenance Offers
FAQFAQ   FAQForum Help   FAQOfficial CCS Support   SearchSearch  RegisterRegister 

ProfileProfile   Log in to check your private messagesLog in to check your private messages   Log inLog in 

CCS does not monitor this forum on a regular basis.

Please do not post bug reports on this forum. Send them to CCS Technical Support

disable_interrupts(INT_RA5) does not work, CCS bug ?

 
Post new topic   Reply to topic    CCS Forum Index -> General CCS C Discussion
View previous topic :: View next topic  
Author Message
nurquhar



Joined: 05 Aug 2006
Posts: 149
Location: Redditch, UK

View user's profile Send private message Visit poster's website

disable_interrupts(INT_RA5) does not work, CCS bug ?
PostPosted: Tue Jul 26, 2011 8:35 am     Reply with quote

CCS PCM C Compiler, Version 4.123
#device PIC12F1822



Am I reading this disassembly correctly ? Question
The enable_interrupts(INT_RA5) seems to generate sensible and working code to twiddle with INTCON (38Bh), IOCAP (391h) & IOCAN (392h) registers.

However the disable_interrupts(INT_RA5) code does not seem to stop the interrupt occuring in my test app and also CCS appears to generating irrational code. ie CCS is trying to reset bit 5 in registers (394h) & (395h), which according to datasheet are not mapped to anything Exclamation

Should CCS support be looking at this Question

Code:
237:                              
238:                              enable_interrupts(INT_RA5) ;
   7AE    158B     BSF 0xb, 0x3
   7AF    0027     MOVLB 0x7
   7B0    1691     BSF 0x11, 0x5
   7B1    1692     BSF 0x12, 0x5
239:                              enable_interrupts(INT_TIMER1) ;
   7B2    0021     MOVLB 0x1
   7B3    1411     BSF 0x11, 0
240:               //               enable_interrupts(GLOBAL) ;
241:                           } else {
   7B4    2FBB     GOTO 0x7bb
   7B5    0020     MOVLB 0
242:               //               disable_interrupts(GLOBAL) ;
243:                              disable_interrupts(INT_RA5) ;
   7B6    0027     MOVLB 0x7
   7B7    1294     BCF 0x14, 0x5
   7B8    1295     BCF 0x15, 0x5
244:                              disable_interrupts(INT_TIMER1) ;
   7B9    0021     MOVLB 0x1
   7BA    1011     BCF 0x11, 0
   7BB    0020     MOVLB 0


Revision Edit
Some further testing shows this works, ie the reverser of the enable ints.

Code:
242:               //               disable_interrupts(INT_RA5) ;
243:                              bit_clear(INTCON,3) ;
   7B6    118B     BCF 0xb, 0x3
244:                              bit_clear(IOCAP,5) ;
   7B7    0027     MOVLB 0x7
   7B8    1291     BCF 0x11, 0x5
245:                              bit_clear(IOCAN,5) ;
   7B9    1292     BCF 0x12, 0x5
Ttelmah



Joined: 11 Mar 2010
Posts: 19537

View user's profile Send private message

PostPosted: Tue Jul 26, 2011 11:52 am     Reply with quote

Look at this thread:
<http://www.ccsinfo.com/forum/viewtopic.php?t=45889>
Note my comment at the end.
Others have also seen this (PCM programmer for example).
There are similar problems on some other chips.
It has been reported to CCS, but the more people who do so, the higher the likelyhood that they may fix it.

Best Wishes
nurquhar



Joined: 05 Aug 2006
Posts: 149
Location: Redditch, UK

View user's profile Send private message Visit poster's website

PostPosted: Wed Jul 27, 2011 1:40 am     Reply with quote

I have emailed support with this bug and also referenced this thread. So hopefully it will appear on somebodys "todo" list at CCS.
Display posts from previous:   
Post new topic   Reply to topic    CCS Forum Index -> General CCS C Discussion All times are GMT - 6 Hours
Page 1 of 1

 
Jump to:  
You cannot post new topics in this forum
You cannot reply to topics in this forum
You cannot edit your posts in this forum
You cannot delete your posts in this forum
You cannot vote in polls in this forum


Powered by phpBB © 2001, 2005 phpBB Group