FPGA PIC16****

[FZS1000]

Hello!

I have a project were I've written my own PIC in VHDL and implemented it in a Xilinx Spartan 3E type FPGA. The PIC behaves a quite much like a 100MHz version of the PIC16F877 with 8k program memory. The PIC software is written in C and compiled with PCWHD and further on sent to the FPGA via a standard serial port.
As the FPGA has quite a bit of available resources, my question is how to expand the program memory, as 8k isn't enough for me.
I can see that compiling the code in PCWHD naturally uses the PCLATH register and so the whole program is split into four 2k pieces. Now I am wondering if there is any possibility to "trick" the compiler to use for example an 8-bit PCLATH register instead of a 5-bit as with the original PIC. This would give an additional 3 bits to the program counter and therefore expand the program memory to 65K which is enough for me.

I would be thankful if anyone knew the answer to this rather exotic question?

Thanks in advance,
Jonas

[Ttelmah]

Hmmm.
Not really a CCS question.
However I've done several PGA based PIC emulations over the years.
I'd have to say that if I wanted a much larger memory map, I'd implement a PIC18, rather than a PIC16....
If you look at the PIC16 family, chips like the 1947, have 32Kbytes of program memory, and the implementation used for this allows for a 32K*14 memory map, which is only half full as used on these chips. The memory space as laid out on these, would be the largest easy to implement, and certain of working, using 64K bytes of addresses (the flash accesses etc., would fail beyond this).
So copy the implementation of these, and the settings in the device database for these.

Best Wishes

[FZS1000]

Thanks for the reply.

Actually I have looked at the datasheets of those devices with larger than 8K of memory. Devices like 15** or 19**. Only thing with these and the PIC18 family is that the instruction set is somewhat expanded (14 more instructions for the high end PIC16) and a lot more for the 18 family (16 bit opcode). This would naturally result in adding these to the VHDL core but I was thinking of an easy workaround by just expanding the PCLATH register as I described before.

Of course I could use the compiler with the settings of an 16F15** device and "hope" that the compiler doesn't use any of my unimplemented instruction =D Or then just put a little more work on the VHDL and implement these....

Another workaround which came to mind is to manually set these bits of the PCLATH register and so take care of the program memory paging myself. But this would perhaps be rather cumbersome compared to the normal situation where the compiler automatically handles this.

Jonas