Open-collector or open-drain output on a PIC

kender · Joined: 09 Aug 2004 Posts: 768 Location: Silicon Valley

Colleagues,

This is, probably an easy question for those who know the answer. Is there a way to arrange an open-collector or open-drain output on a PIC18F4520 without adding a separate transistor? I think, according to the datasheet, the answer is “no”.

Thanks,
- Nick
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Read the label, before opening a can of worms.

PCM programmer · Joined: 06 Sep 2003 Posts: 21708

Use these two functions to emulate an open-drain output:

kender · Joined: 09 Aug 2004 Posts: 768 Location: Silicon Valley

Actually, I want the pin to have high impedance, when the PIC is powered down. Currently, I see that the pin is tied to ground, when Vcc = 0.
_________________
Read the label, before opening a can of worms.

RLScott · Joined: 10 Jul 2007 Posts: 465

coast · Joined: 03 Jan 2008 Posts: 6 Location: WALDERSLADE, KENT,UK

open drain output does not require an external [spam] if you can constrain levels within the 0 to +5V range of yr power supply rails (or whatever yr PSU range happens to be). The internal protection diodes will dump energy back into the power rail above this level. If you DO need an external [spam] then ZVN3306 or sim. is normally a good bet (no other surrounding components). You may however choose to put a 1 meg pull down from gate to ground to control initial conditions (to make sure the [spam] is off during reset time)

coast · Joined: 03 Jan 2008 Posts: 6 Location: WALDERSLADE, KENT,UK

Please note that the SPAM words in my last reply were what the CCS site chose to replace the word transistor with!!
Programmers can be very strange people.

Ttelmah · Guest

It is worth remembering, that this is 'inherent' in the outputs of the PIC, without even considering any deliberate protection devices added. If you take a P channel FET, and ground the gate, and source, there will be an apparent diode seen if you try then to raise the drain.

Best Wishes

SET · Joined: 15 Nov 2005 Posts: 161 Location: Glasgow, UK

We got caught out where we had a design that drove a triac optocoupler by current sinking into port pins. At power up there would sometimes be a glitch.. changing to source drive fixed it.

So the port pins definitely 'gulp' some current at power up - as to why:

1. Protection diodes - doubtful, as the pin and power pin will ramp up at the same time

2. P-channel FET - but if you raise the drain (i.e. the pin), the source would also rise (the supply) sot he inherent diode wont conduct?, and of course the gate shouldnt conduct...

There might be implications for battery powered systems, which are switched on and off - though I suppose the amount of 'gulp' current will be low.

Guest · Posted: Thu Jan 10, 2008 10:11 am

I noticed the above message and I wanted to test the spam out.

transistor, eggs, bacon and transistor.

So I typed; XSTR, eggs, bacon and XSTR. where XSTR is the full name - t r a n s i s t o r

Let's see if this works?

Guest · Posted: Thu Jan 10, 2008 10:13 am

Nope - didn't work... I wonder how the other chap spelled the word - transistor that the board edited it out with [Spam]???

newguy · Joined: 24 Jun 2004 Posts: 1909

I bet it's either 1) trans or 2) tran.

1) T r a n s
2) t r a n

edit: nope.

SET · Joined: 15 Nov 2005 Posts: 161 Location: Glasgow, UK

Try T r a n n y
[spam]

Yep :-)

asmallri · Joined: 12 Aug 2004 Posts: 1635 Location: Perth, Australia

Guest · Posted: Thu Jan 10, 2008 4:53 pm

[spam], eggs, bacon and [spam]!

Yeah - Monty Python Lives!

:-)