Maximum WDT time

[lokeshbhatt]

Hi,

I'm using pic16f690.
I think we can give maximum delay of 2.3 sec.

If no then how much delay we can give, and how.

Is there isr required for that?

Thanks & Regards
Lokesh
_________________
Thanks & Regards
Lokesh Bhatt

[Ttelmah]

No, for two reasons.

The first, depends on whether you want to use the second 8bit prescaler for timer0 or not. If not, then the maximum division available for the watchdog, is 128*128 = 16384. The watchdog nominal timeout, is 17mSec, giving a maximum _nominal_ time of about 270seconds (the data sheet quotes 268).
This is setup like:
setup_wdt(WDT_2304MS|WDT_TIMES_128);
which multiplies the selected time by 128.
However 'see below'

The second part though, is the _nominal_ bit. The watchdog only gives very approximate times. It is quoted as 10mSec shortest, 17mSec 'typical' (not the 18mSec that CCS have assumed), and 30mSec longest. So even with the single 128 divider (the nomimal about 2.3 second selection), the 'actual' times, will vary between chips, and with supply level, between about 1.3 seconds, and 3.8 seconds...

Best Wishes