Monitor 12F683 Vdd and wake-up when >2Vdc

[delesan]

I am using a PIC 12F683 and the CCS C-compiler on an MPLAB IDE.

I would like to write a program that monitors the Vdd on a 12F683 that is in sleep mode and wakes-up only when Vdd is greater than 2Vdc.

Appreciate your suggestions.

[ckielstra]

Read the data sheet on the brown-out feature.
The brown-out fuse will keep the chip in reset when Vdd < 2.0V

[delesan]

I am new to programming with the PIC12F683 and the CCS compiler.
I have gone through the 12F683 manual and also the CCS C- reference manual but its not clear. How do I set the value of VBOR and TBOR? Could you assist with example program codes in C for this? I have been using this forum as reference as I progress programming the 12F683.

[Ttelmah]

Are you sure you are reading the right data sheet?....
The 12F683, doesn't have any VBOR configurations. Single voltage at 2.1v.
The four possible configurations for the brownout, are:

[delesan]

Thanks.

Will write a small program using Brownout enable in configurations.

Will keep you posted on my progress.

As a background, am powering the 12F683 with a periodic burst pulse rectified to dc and the 12F683 is set for an internal clock frequency of 500KHz. Its envisaged that while Vdd voltage to the chip is less than 2Vdc, the 12F683 remains in sleep mode and only awaken when Vdd is >2Vdc thereby blinking an LED.

[Ttelmah]

You need to understand that with Vdd<2v, the chip reaches the point where there is not sufficient voltage present to maintain data correctly latched in the internal registers and memory. The minimum warranted voltage for the chips internal registers to hold data, is 2v. As such you can't put the chip to sleep, and expect to wake up again with data intact, if you go below this.

However when asleep, the chip draws a tiny amount of power. I have processors that have happily held their data, with 'standby' supply rails from a coin cell, used whenever the chip is asleep, for many years.
You have a series of choices:
1) Add an external power monitor circuit. Have this switch the processor to a battery supply, when the incoming rail falls below 2v, and trigger an interrupt to wake the processor when the supply rises above this. Put the processor to sleep when on the battery supply. Done properly, consumption of a couple of nA is possible like this.
2) Use the brownout. Have the processor code re-initialise when this it restarts.
3) Do a similar battery 'sleep' to '1', but with the processor switching the supply rails. Keep the comparator circuit awake, and have this trigger the wake-up. Downside, consumption increases to >30nA, and if you use the internal comparator Vref, well over 100nA.

The simplest, and cheapest solution, is just to use the brownout, and write the code to correctly reinitialise when power is re-applied. The most reliable/flexible solution, is '1', but this requires external components.

Best Wishes

[delesan]

Many thanks for the detailed explanation.

This explains why the 12F683 manual talks about 2.1V.

For my particular application, I will go for the Brownout as I am restricted and can't add further external components and have to rely on software.
You mentioned that the program must be able to re-initialize when it wakes from Brownout. Could you expantiate more? Is there any website/link I could visit for example c-codes where Brownout has been practically used? Since I am limited to a periodic supply lasting ~ 1s, I need to efficiently use it to power the 12F683 casuing it to blink an LED. The smothening capacitor in the rectifier circuit is in the hundred uF range and takes a while to charge-up. During this charge-up phase, I will like the microcontroller to remain in sleep mode.

[delesan]

Just checked through the 2007 12F683 data sheet. On page 87, Figure 12-3 shows that the brownout causes a positive-going rise in the internal reset when there is a dip below Vdd, lower than VBOR. It doesn't reset for an increasing Vdd.
I am interested in monitoring the Vdd on the 12F683 from start-up, as the voltage ramps-up across the charging capacitor. During the charging period, the 12F683 should be in the 'sleep' mode; only waking up when the Vdd voltage exceeds 2.1Vdc and then blink an LED.

[Ttelmah]

If your processor is not awake, it can't go to sleep....
The point about brownout, is that it ensures a clean reset, when the voltage falls into the 'danger area'.
The brownout circuitry _holds the device in reset_, once the voltage is below Vbor, _till the voltage rises above Vbor_. It releases on the rise.
If your voltage rises slowly, you will not meet the SVdd spec (0.05V/mSec for the rise in Vdd, to guarantee a reset).
You really cannot do what you are describing, without external circuitry.

Best Wishes

[delesan]

Many thanks once again for the clarification.
I will now resort to setting a long delay immediately on power-up of the 12F683 - time enough for the capacitor to charge with minimal loading from the PIC- and on the elapse of the delay, blink the LED.

Thanks for your contributions and suggestions.