18f4553 usb

[nicotec]

Hi everyone,
can anyone help me to understand if there are errors/missing in my code (v4.114) considering that I'm using a 20MHz quartz; I need just to start to understand if sequence to use hardware usb built-in sequence is correct to obtain enumeration since my simulation with proteus not work I suppose there is an error.
Thanks in advance and regards

[Douglas Kennedy]

This board is about hardware and the CCS compiler. Proteus is neither of these since it is a simulator and brings with its own host of potential issues.
The way forward is to actually build a circuit. With the circuit you can tell which errors reported by Proteus are real or just free features of Proteus.

[nicotec]

Sorry for misunderstanding but I don't need any help on Proteus. Only to know if the concept of code is correct or there are missing a calling procedure for the first initialization of usb module.
Thanks in advance and regards.

[Ttelmah]

You have two 'disagreeing' sets of clock settings.
The fuses say:

HSPLL - CPU clock will come from the PLL (PLL is _always_ 'enabled').
PLL5 - Take external crystal/5 to feed PLL.
CPUDIV4 - Divide PLL/2 by 6 (look at the data sheet to see why....), to feed CPU.

So with the fuses, the CPU will be running at 8MHz, but your clock setup line says to run it at 4MHz (which requires HS, not HSPLL).

There can be problems trying to run USB, with a CPU clock as low as 4MHz....

Best Wishes

[nicotec]

Sorry, since I need to use usb, from data sheet I need to set MCU frequency to 24MHz so could You confirm that it would be 24000000 and not 4000000 with fuse needed to be changed accordingly?

Thanks in advance and Regards

[Ttelmah]

I think you are misunderstanding the oscillator.

The oscillator on the 53, is the same layout as on the 4550 (this is why the 4553 data sheet refers you to the 4550 data sheet, and describes itself as 'supplementary' to this).
For full speed USB, the only requirement, is that the PLL, is generating 96Mhz. You can run the CPU at any one of several dozen frequencies, choosing divisions of the external clock, from the PLL, or even the internal RC oscillator.
To get to 96MHz, given the PLL is *24, you need a 'feed' at 4MHz to this. Since available dividers are 1,2,3,4,5,6,10 & 12, you are restricted to a crystal at 4,8,12,16,10,24 MHz, or an external oscillator at the same frequencies or 40/48 MHz.

So starting from one of these frequencies, you then select the PLL divider needed to give 4MHz. For the 20MHz quartz, this implies PLL5. Then you can select the CPU to feed from the USB PLL, the crystal, or the internal oscillator HSPLL, HS, or INTRC.
If using HS, or HSPLL, the incoming frequency (96MHz for the later, or the crystal frequency for the former), can be divided. (CPUDIV1 to CPUDIV4). However the actual divisions are 1,2,3,4, if using 'HS', or 2,3,4 & 6, if using HSPLL. So with the 20MHz clock, you could run:
20,10,6.66,5,48,32,24,16 MHz, or the frequencies from the internal RC oscillator. CPUDIV4, gives division by 6, if using the PLL....

So straight away, 4MHz, is not one of the options with this crystal. However there are also timing constraints on USB (how fast it must respond), and the lowest rates, can sometimes cause problems, especially if your code is doing much else. Personally, I'd probably select a slightly slower crystal (8MHz), which will reduce the oscillator consumption a little, and run the CPU at this frequency, which is adequate if you are not wanting to do too much.

Now your reference to 24MHz, makes me think that you are possibly looking at the oscillator on the J50 chips, and wanting to run the USB at low speed, rather than full speed (which requires this speed).

Best Wishes