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[OT] - Internal EEPROM W/R cycles

 
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Gabriel



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[OT] - Internal EEPROM W/R cycles
PostPosted: Fri Jul 20, 2012 8:28 am     Reply with quote

Hi,

Sorry for being OT, but does anyone know if the 1M write/erase cycle "limit" on the internal EEPROM is: per Byte, or 128byte page, or the whole 256 block? i cant find it on the datasheet, like on the 25LC512 chips...

16F886.

G.
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treitmey



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PostPosted: Fri Jul 20, 2012 9:50 am     Reply with quote

..

Last edited by treitmey on Fri Jul 20, 2012 11:32 am; edited 1 time in total
bkamen



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Re: [OT] - Internal EEPROM W/R cycles
PostPosted: Fri Jul 20, 2012 10:07 am     Reply with quote

Gabriel wrote:
Hi,

Sorry for being OT, but does anyone know if the 1M write/erase cycle "limit" on the internal EEPROM is: per Byte, or 128byte page, or the whole 256 block? i cant find it on the datasheet, like on the 25LC512 chips...

16F886.



Technically speaking, it is PER CELL. That is FLASH cell.

HOWEVER, it's important to realize that you normally would write to a location which might consist of bytes, words or pages.

But let's say you erased and re-flashed the same page with the same information 1,000times. For every bit that was 0, you would have exercised the cell once for every time you wrote a 0 to that cell (or bit).

TECHNICALLY speaking, all other cells (bits) that were set to 1 (which is really doing nothing in terms of programming the flash), would NOT have been exercised.

So what you're left with after 1,000 writes are some cells (bits) that have lost some of their useful life and some that have not -- but are collected together in a single storage unit (in terms of a byte or word) thus lowering the number of write cycles left for the unit.

If you want to write a zillion times to a location, you use RAM. That's what it's for.

If you want it to be non-volatile, you can find external SRAM's that need only a larger Super-CAP to hold their data for long times between power cycles. Lithium batteries will hold them for years.

First -- define what you think is the life of your gizmo. Then calculate how many writes the part will endure over that life. THEN figure out a strategy for storing variables long term.

Cheers,

-Ben
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PostPosted: Fri Jul 20, 2012 11:51 am     Reply with quote

because of the applications i create for PICs - i find it incumbent to add error check/verify overhead bytes to any data that is saved in EEPROM - whether external or internal, and at the level of abstraction above the stored data to allow a safe substitution of data when error occurs - as well as REPORTING any such eeprom read failures.

that said - i have only one or two known instances of EEPROM going bad.
( and that was in a situation where easily 100k write cycles had occurred )
Gabriel



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PostPosted: Fri Jul 20, 2012 1:09 pm     Reply with quote

Its a logger, meant for continuous years of operations at 4logs/h to 1log/h
single 16bit value being logged per log interval... (i know it will take years to get to 1M write cycles).

I was thinking of storing 128 bytes of data on PICs local EEPROM before doing a page write on an 25LC512....

Instead of a byte by byte insertion on the 25LC512,since its write cycles count per page (as i understand it)... which i understand as every byte i write individually "kills" the entire 128page one write cycle at the time...
thats assuming the PICs eeprom doesn't suffer the same "problem"

Ram doesn't quite cut it because i have guarantee the values will survive a power failure.... of infinite lengths... its a very, very, very remote location.


From your comments i understand that the damage is caused on the individual bits actually being written... which collectively comes out to be ~1M write cycles?

I guess in the end i just want to know if its worth going through the trouble of using my 1M Write cycles conservatively in 128B page writes instead of doing 64k individual byte writes...

I was under the impression i could write 1M times to the same address and _not_affect adjacent addresses...

thanks

G


EDIT:

This is what is causing me greif... from the 25LC512 data sheet:

Quote:
When doing a write of less than 128 bytes
the data in the rest of the page is refreshed along with
the data bytes being written. This will force the entire
page to endure a write cycle, for this reason endurance
is specified per page

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Ttelmah



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PostPosted: Fri Jul 20, 2012 1:18 pm     Reply with quote

Store the data in ram, till you write it.
All you need is enough hold time on your power supply, to allow a page write to be performed if the incoming power fails. Easy with even quite small capacitors.
Even better, get rid of the external EEPROM, and use an external FRAM instead. No need for page writes, even better storage life than EEPROM, and writes as fast as you can clock the data. You still need to _ensure_ that writes complete when power fails.

Best Wishes
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