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mahdi70
Joined: 05 Jan 2016 Posts: 44
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dspic33fj256gp506 timer2 external clock |
Posted: Thu Mar 17, 2016 10:14 am |
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hi... I bought 33fj256gp506 and this micro have external pin for t2ck and no need to use #pin_select. In #pin_select mode the internal and external clock get sync. Main clock 50 MHz and external clock for Timer2 is 100 MHz but its not work. Why?
PIN_C1 for t2ck
tnx |
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temtronic
Joined: 01 Jul 2010 Posts: 9287 Location: Greensville,Ontario
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Posted: Thu Mar 17, 2016 12:34 pm |
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You need to post your program ! Complete, small, compilable like the 1Hz LED program.
Your PIC might not work due to a hardware error NOT code relate but until we see your code, no one can say 'Yes, the code is wrong'.
Jay |
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jeremiah
Joined: 20 Jul 2010 Posts: 1362
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Posted: Thu Mar 17, 2016 2:43 pm |
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Just as a note, the datasheet for the chip, page 275, table 25-23, specifies timing requirements for the external timer 2 input.
It specifies the minimum period is Tcy + 40ns. The data you have given won't work within the data sheet parameters
Fcy = 50MHz/2 = 25MHz
Tcy = 40ns
Minimum period for T2CK is Tcy + 40ns = 40ns + 40ns = 80ns
Maximum frequency for T2CK is 12.5 MHz while you are supplying 100MHz
Now if you are using the PLL or some prescalers on the input, that would change things, but the info you provided doesn't suggest this.
Something to keep in mind. Even if it appears to work in one configuration, being out of spec of the datasheet is not a good thing. |
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mahdi70
Joined: 05 Jan 2016 Posts: 44
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Posted: Thu Mar 17, 2016 5:59 pm |
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temtronic wrote: | You need to post your program ! Complete, small, compilable like the 1Hz LED program.
Your PIC might not work due to a hardware error NOT code relate but until we see your code, no one can say 'Yes, the code is wrong'.
Jay |
Code: | #include <33FJ256GP506.h>
#FUSES NOWDT //No Watch Dog Timer
#FUSES CKSFSM //Clock Switching is enabled, fail Safe clock monitor is enabled
#FUSES NOJTAG //JTAG disabled
#device ICSP=1
#use delay(crystal=50MHz)
#INT_TIMER2
void timer2_isr(void)
{
output_toggle(pin_g0);//interrupt every 100ms
}
void main()
{
setup_timer2(TMR_EXTERNAL | TMR_DIV_BY_256, 40000);//100 mhz external clock
enable_interrupts(INT_TIMER2);
enable_interrupts(INTR_GLOBAL);
while(TRUE)
{
//TODO: User Code
}
} |
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mahdi70
Joined: 05 Jan 2016 Posts: 44
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Posted: Thu Mar 17, 2016 6:08 pm |
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jeremiah wrote: | Just as a note, the datasheet for the chip, page 275, table 25-23, specifies timing requirements for the external timer 2 input.
It specifies the minimum period is Tcy + 40ns. The data you have given won't work within the data sheet parameters
Fcy = 50MHz/2 = 25MHz
Tcy = 40ns
Minimum period for T2CK is Tcy + 40ns = 40ns + 40ns = 80ns
Maximum frequency for T2CK is 12.5 MHz while you are supplying 100MHz
Now if you are using the PLL or some prescalers on the input, that would change things, but the info you provided doesn't suggest this.
Something to keep in mind. Even if it appears to work in one configuration, being out of spec of the datasheet is not a good thing. |
when the chip have external pin for extern clock the internal and external clock not sync..I am right?
in pin_select mode the external and internal clock sync |
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Ttelmah
Joined: 11 Mar 2010 Posts: 19611
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Posted: Fri Mar 18, 2016 3:52 am |
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This is one of those 'data sheet' faults.....
If you look at the block diagrams for all the Timer 2 etc., timers, you will see that in the signal path from the input, there is still a 'sync' block, whatever source you use (this is distinct from the 'gate' sync, which you can enable separately).
This thread covers it quite well:
<http://www.microchip.com/forums/m749886.aspx>
Only timer1, is a type A type timer. Only type A timers can run fully async.
The data sheet conflicts with itself in several places over this.... |
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