PIC micro controller oscillator frequency

[srikrishna]

Hello guys

The internal clock (Q1–Q4) of PIC Micro controller runs at a quarter of the oscillator frequency (FOSC/4).

My question is if i divide the frequency with 4 Then the timer period of each clock pulse will increase 4 times like the picture shown below



However this picture is confusing. it shows after the internal circuitry divides the clock into four even quadrature clocks. the timer period of each clock (i.e Q1, Q2, Q3, and Q4) less than the main primary oscillator(that is connected to the OSC1 and OSC2 pins).
But i think time period of each clock pulse must be 4 times time period of main primary oscillator.



1. Can anybody explain the above??

2.What is the frequency of oscillator is it FOSC/4 or only FOSC??

3. What is machine cycle ??

[temtronic]

re: 1 , yes though it does not apply to CCS C coding of PICs. For detailed info, just download a couple of the PIC application notes from Microchip ! When you've read how the 'internals' of a PIC works, it all make perfect sense.

re: 2, typically with a 4MHz xtal(and 2 caps), the PIC 'clock' runs at 4MHz BUT the 'execution' speed is 1MHz, giving a nice 1us/instruction timing.

Now your diagram isn't correct as it shows Fout to be 1/2 of Fin.
As for timer usage, every PIC datasheet has an entire chapter for 'timers' that includes the math and charts to allow you to setup the registers. As well, again, check Microchip's appliation notes! Even the ones written 25 years ago are valid today !!

Hopefully you have an oscilloscope on the bench, if not, save up for one. Even a 25 year old, 2 channel, analog one WILL be the BEST investment for your hobby.

[Ttelmah]

A PIC15/18, running from a master clock of 4MHz, executes 1MIPS. It is not running an 'internal clock' at 1MHz, it is using four phases of the master clock to execute each instruction. Some parts of each instruction are executed on phase 1, some on phase 2, etc. etc... So (for instance), it responds to interrupts on phase 1 of the instruction after an interrupt event occurs.
Historically all processors need separate phases from the clock to perform the sub components of their instructions. The old Z80, uses a four phase clock, just like the PIC. The 6502, instead inverts the incoming clock, and uses alternate 'halves' of these waveforms to give the phases. The DsPIC's switch to a similar design (so execute Fosc/2 instructions per second).

On the 16/18 PIC, each phase of the instruction execution, is one cycle of the master clock. It takes four phases to execute a typical instruction (but eight to execute a jump/call). The time period of each phase, is one cycle of the master clock.

The frequency of the oscillator, _is_ FOSC. (Frequency OSCillator).

The clock fed to most peripherals is from the phase 1 cycle, so is Fosc/4. However things like the PWM can be fed from Fosc.

[srikrishna]

What is oscillator cycle?

if i use 4 MHZ external crystal oscillator Then ?what will be the frequency of oscillator cycle??

[Ttelmah]

4MHz.

Unless you have a chip with a PLL. On these you can synchronise an internal 'synthetic' oscillator to a multiple of the external clock.
On most of the PIC18's with this feature, just *4. However some of the USB PIC's support more complex multipliers while some of the DsPIC's offer really complex multipliers.