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randy.shaffer
Joined: 21 Mar 2018
Posts: 51
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| PWM on C0 of 16LF1938 |
 Posted: Thu Nov 21, 2019 4:58 pm |
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| Code: | setup_timer_2(T2_DIV_BY_16, 250, 1); // F = 4E6/(16*250*1) = 1KHz
setup_timer_4(T4_DIV_BY_16, 250, 1); // F = 4E6/(16*250*1) = 1KHz
setup_ccp1(CCP_PWM); // setup CCP1 as PWM
setup_ccp2(CCP_PWM); // setup CCP2 as PWM
setup_ccp3(CCP_PWM | CCP_TIMER4 | CCP_P2B_C0);
set_pwm3_duty(125); |
I'm using Timer 2 for PWM1 and PWM 2 and both work fine. I'm trying to get a PWM signal out of C0 using Timer 4 but not getting anything. Thanks for having a look. Compiler is v5.080 |
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temtronic
Joined: 01 Jul 2010
Posts: 9243
Location: Greensville,Ontario
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| Posted: Thu Nov 21, 2019 5:07 pm |
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I don't use that PIC but....
If that PIC has 'programmable pins', either 'pin select' or through the APFregisters, you'll need to 'assign' the pin BEFORE the setup...pwm...code
Jay |
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PCM programmer
Joined: 06 Sep 2003
Posts: 21708
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| Posted: Thu Nov 21, 2019 7:50 pm |
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Looking at the .LST file, it looks like the wrong pin is used for TRIS.
| Quote: |
.................... setup_ccp3(CCP_PWM | CCP_TIMER4 | CCP_P2B_C0);
003F: MOVLB 02
0040: BCF APFCON.CCP3SEL
0041: MOVLB 01
0042: BCF TRISC.TRISC6
0043: MOVLB 02
0044: BCF LATC.LATC6
0045: MOVLW 0C
0046: MOVLB 06
0047: MOVWF CCP3CON
0048: CLRF PWM3CON
0049: CLRF CCP3AS
004A: MOVLB 05
004B: BSF CCPTMRS0.C3TSEL0
004C: BCF CCPTMRS0.C3TSEL1
004D: MOVLW 01
004E: MOVLB 06
004F: MOVWF PSTR3CON |
Try adding the line shown below in bold. Put it in the position shown.
| Quote: |
setup_timer_2(T2_DIV_BY_16, 250, 1); // F = 4E6/(16*250*1) = 1KHz
setup_timer_4(T4_DIV_BY_16, 250, 1); // F = 4E6/(16*250*1) = 1KHz
setup_ccp1(CCP_PWM); // setup CCP1 as PWM
setup_ccp2(CCP_PWM); // setup CCP2 as PWM
setup_ccp3(CCP_PWM | CCP_TIMER4 | CCP_P2B_C0);
output_low(PIN_C0);
set_pwm3_duty(125); |
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Ttelmah
Joined: 11 Mar 2010
Posts: 19540
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| Posted: Fri Nov 22, 2019 1:46 am |
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Personally if it is a TRIS problem I'd just use:
output_drive(PIN_C0);
Which will just set the TRIS to 0 without changing the output latch.
Doesn't 'matter', since the PWM will override the latch value, but seems
a tiny fraction 'tidier'...  |
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PCM programmer
Joined: 06 Sep 2003
Posts: 21708
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| Posted: Fri Nov 22, 2019 3:13 am |
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At first I thought that too, but I decided to copy what CCS does in the
posted .LST file code. |
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Ttelmah
Joined: 11 Mar 2010
Posts: 19540
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| Posted: Fri Nov 22, 2019 3:19 am |
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Interesting.
I suspect this is done on the assumption that if this is a PWM, then if the PWM
is disabled, the output should go low for safety. Obviously a wrong assumption
if this is for example the 'high' transistor of a pair, but likely to be right
a lot of the time. So if you then disable the PWM on the pin, it'll have the
latch set low.
Good reason, and makes sense. |
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randy.shaffer
Joined: 21 Mar 2018
Posts: 51
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| Posted: Fri Nov 22, 2019 9:14 am |
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| Thanks so much for the replies. I may be trying to use the wrong CCP & pin. The data sheet shows CCP3 at Pins C6 or B6 and C0 is P2B. Do I have to use CCP2 for C0? Ultimately, I'm hoping to get PWM at C0 that is based on a different timer than the ones used on C1 & C2. |
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