ICSP and PIN/PORT Status

andresteff · Joined: 21 Mar 2020 Posts: 44

PIC24F16KA301
CCS version 5.080

Hey,
i would like to know what the pin status is during programming.
I think all pins are input, but can't find any comments in the data sheet.

How do the pull down (CN PINS) behave during programming? I will use they to pull down gates from fets.

temtronic · Posted: Thu Feb 11, 2021 3:33 pm

Any chance you can dedicate the ICSP pins to just ICSP usage ??
If not you'll have to redesign the PCB,add parts, jumpers, etc. to ISOLATE the ICSP pins from everything but the programmer.

After having 'fun' trying to get 'double duty' from ICSP pins , I gave up. It was easier and far more reliable to just dedicate ICSP pins to ICSP. While it may cost a few pennies more to use 40 pin PICs instead of 28 pin PICs, it's made my life simpler....

Microchip do have several apnotes/articles about how to isolate the pins. I've seen some 'development ' boards use a 4PDT switch for 'PGM/RUN'. Hmm, the switch is bigger then the PIC and costs more too !

newguy · Joined: 24 Jun 2004 Posts: 1908

During programming pins default to their power up state, which is input. This is the safest course of action for any processor because if they drove their pins instead, you could have fatal accidents depending on what the processor controls.

If you require some pins to default high or low, then you're going to need to add pullup or pulldown resistors.

temtronic · Posted: Thu Feb 11, 2021 3:46 pm

hmm.. I will use they to pull down gates from fets.
I'm assuming the ICSP pins, typically B6,B7, are used to turn on FETs?
If so, the programmer will toggle them and FETS will come on/off which could be a BIG problem depending what the FETs are connected to !

PCM programmer · Joined: 06 Sep 2003 Posts: 21708

Ttelmah · Joined: 11 Mar 2010 Posts: 19536

Yes, the standard on most of the chips is that the pins go to the 'reset'
state. During reset, all of the I/O pins are normally set as inputs, so
high impedance. This agrees with what PCM has found in the documentation.
Anything driving a FET, always needs to have a basic resistive circuit to
ensure that the 'float' during the few mSec at boot is not a problem, and
ICSP, raises this requirement to be able to deal with several seconds,
rather than just a few mSec....
Quite a few of the FET gate driver chips, are designed so that they
automatically bias the FET gates to a safe state, when not driven, for
exactly this reason.

temtronic · Posted: Sat Feb 13, 2021 8:14 am

hmm reread the Op....
One potential problem is not having a 'strong' pulldown . It's possible that since the pin is Hi-Z, it'll act like an antenna and some EMI could be enough to turn on the FET.... rare but it can happen.