Interrupt on change

[SeeCwriter]

I'm using a 12LF1552, v5.075 compiler. What does constant INT_IOC do when used with enable/disable_interrupts?
It sets bits that are not used in any other INT_IOC_XXX define.

[temtronic]

You should post a small, compilable program that shows what you're asking. That will allow us to compile and test on our computers as well as dump the listing.
If you dump the listing , you can easily see which bits of what registers are being set or cleared. Consulting the datasheet section that has IOC info and the PIC device header will show what's going on and why.

[SeeCwriter]

I want to use the interrupt-on-change feature with pins A0 & A1. I'm not following what file instructions ANDWF and IORWF are acting on.

Here's the listing for both:

[Ttelmah]

It enables _all_ the IOC bits.
So '0xFF' into the mask, while the others just enable the bits they specify.

[SeeCwriter]

The datasheet has a note in paragraph 7.6, that says "The IOCIF Flag is read-only and cleared when all the interrupt-on-change flags in the IOCBF register have been cleared by software."

Yet, a search for IOCBF only finds one result, in the note I just quoted. There is no register definition for IOCBF.

When using INT_IOC in clear_interrupt(), it only clears the IOCIF bit in INTCON register, not all flags in the IOCBF register, where ever that is. Using INT_IOC_A1 | INT_IOC_A0 seems to do more.

So, is using INT_IOC sufficient to use for clearing IOC interrupts? It looks to me like it's not.

[PCM programmer]

Clearly a copy-and-paste job by the techwriter at Microchip.

[SeeCwriter]

It just occurred to me that the note I quoted in my previous post says the IOICF is "read-only". Yet, clear_interrupt(INT_IOC) writes to the IOCIF bit.

Is the datasheet in error, or is the compiler in error?

[temtronic]

this..