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temtronic
Joined: 01 Jul 2010
Posts: 9245
Location: Greensville,Ontario
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 Posted: Tue May 08, 2018 5:20 am |
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You may want to manually set the proper bits in the correct registers and bypass the CCS code, at least for testing. The ISR_RB wasn't being entered.
I just figured out the header for the 18F46K22 doesn't have the correct defines to setup IOCB register ! That took some head scratching cause everything else looked good. I usually think it's just my bad tpying, er... typing.....
Viewing the 'disassembly listing' showed the IOCB was at 0xF62 yet it's really at 0xF79. GETENV returned the correct address, stuff the correct bits and IOCB works fine.
Jay |
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asgudeman
Joined: 25 Apr 2018
Posts: 13
Location: Arizona
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| Posted: Tue May 08, 2018 9:20 am |
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Here is the code, in totality of me just trying to toggle a pin at a timer interrupt rate.
| Code: |
#include <18F25K42.h>
#fuses RSTOSC_HFINTRC_64MHZ
#fuses NOMCLR
#fuses NOCLKOUT
#use delay(internal=64000000)
void main(void)
{
// Enable global interrupts
enable_interrupts(GLOBAL);
enable_interrupts(PERIPH);
setup_timer_4(T4_DIV_BY_16, 249, 1);
enable_interrupts(INT_TIMER4);
while (1)
{
}
}
#INT_TIMER4
void TIMER4_isr(void)
{
clear_interrupt(INT_TIMER4);
output_toggle(PIN_C6);
}
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I have taken off the ICD fuse, used CCSLoad to simply load the application into the chip, power cycled, removed the debugger header and re-powered. Nothing is making these interrupts work at this moment. |
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asgudeman
Joined: 25 Apr 2018
Posts: 13
Location: Arizona
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| Posted: Tue May 08, 2018 9:34 am |
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| temtronic wrote: | You may want to manually set the proper bits in the correct registers and bypass the CCS code, at least for testing. The ISR_RB wasn't being entered.
I just figured out the header for the 18F46K22 doesn't have the correct defines to setup IOCB register ! That took some head scratching cause everything else looked good. I usually think it's just my bad tpying, er... typing.....
Viewing the 'disassembly listing' showed the IOCB was at 0xF62 yet it's really at 0xF79. GETENV returned the correct address, stuff the correct bits and IOCB works fine.
Jay |
Jay,
I am VERY new to CCS - a customer has required our use of it. I love the simplified API and everything, using the test-boards was great and easy. But this chip is new so the bugs may have needed to be worked out.
Could you possibly tell me how to directly change this register? Similar to how :
#bit C1OUT = getenv("SFR:CM1CON0").6
Is used? |
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PCM programmer
Joined: 06 Sep 2003
Posts: 21708
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| Posted: Tue May 08, 2018 10:16 am |
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OK I ordered it. I added it to an existing order. It will ship today and
I should get it by Friday. I'll work on it then, assuming it's not solved
by that date. |
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asgudeman
Joined: 25 Apr 2018
Posts: 13
Location: Arizona
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| Posted: Tue May 08, 2018 10:20 am |
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| PCM programmer wrote: | OK I ordered it. I added it to an existing order. It will ship today and
I should get it by Friday. I'll work on it then, assuming it's not solved
by that date. |
Thank you! temtronic thinks there is a vector mapping issue and that was my thought the entire time. I am wondering how I can properly (accurately) map the vectors (at least the 5 i am using) to work so I can continue on until a patch is given? |
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PCM programmer
Joined: 06 Sep 2003
Posts: 21708
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| Posted: Tue May 08, 2018 11:45 am |
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| asgudeman wrote: |
Could you possibly tell me how to directly change this register? Similar to how :
#bit C1OUT = getenv("SFR:CM1CON0").6
Is used? |
Use #byte. See this page in the CCS FAQ:
http://www.ccsinfo.com/faq.php?page=access_pic_sfr |
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Ttelmah
Joined: 11 Mar 2010
Posts: 19549
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| Posted: Tue May 08, 2018 11:49 am |
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I'm trying to work out what you mean by 'map the vectors'?. You do realise there are only two hardware vectors. Everything else is software.
EX_GLINT.c shows how to create a global interrupt handler that does not use the CCS code at all. You can test which bits have triggered and call your own routines for any interrupt.
However the most likely thing is that some bit of the setup is wrong.
You seem to now be saying that the even interrupts (2, 4 etc.) are working and that it is the odd ones (1, 3 etc.) that have the problems. I'll retry my test code on one of these, and see if I can see what is being set wrong. |
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temtronic
Joined: 01 Jul 2010
Posts: 9245
Location: Greensville,Ontario
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| Posted: Tue May 08, 2018 11:53 am |
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If you press F11 while your project is open, the CCS Manual 'magically' appears. You can then search it for almost anything related to using their version of C.
I generally have it minimized cause I can't member stuff anymore....
Jay |
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asgudeman
Joined: 25 Apr 2018
Posts: 13
Location: Arizona
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| Posted: Tue May 08, 2018 12:16 pm |
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Ttelmah,
Not even glint.c is working. #INT_GLOBAL isn't being executed and the toggle isn't occurring in debug nor release.
I can verify that the PIE register is good for the specific interrupt, I am jsut not finding where the vector to jump to is stored. |
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Ttelmah
Joined: 11 Mar 2010
Posts: 19549
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| Posted: Tue May 08, 2018 12:23 pm |
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There is not any vector to jump to.
The PIC 18 interrupts all jump to 0x18. or 0x8 (if high priority interrupts are enabled and high is selected for that interrupt). Nowhere else.
If INT_GLOBAL is not working then the interrupt is not triggering. |
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asgudeman
Joined: 25 Apr 2018
Posts: 13
Location: Arizona
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| Posted: Tue May 08, 2018 12:33 pm |
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Sorry, my terminology is off it seems.
So INT_GLOBAL is not triggering, is there a workaround at this point? |
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Ttelmah
Joined: 11 Mar 2010
Posts: 19549
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| Posted: Tue May 08, 2018 1:02 pm |
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I have just merrily compiled a program using timer2 and timer3 and both interrupts are happily triggering.
You are setting the fuse NOXINST?. The code will not run without this. |
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asgudeman
Joined: 25 Apr 2018
Posts: 13
Location: Arizona
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| Posted: Tue May 08, 2018 1:44 pm |
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Via support on email, it turns out
#device VECTOR_INTS
Needed to be called. I didn't think of looking for this in the help files or have seen it posted online (haven't heard of it). Interrupts are happily triggering. Thank you everyone for the support! |
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Ttelmah
Joined: 11 Mar 2010
Posts: 19549
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| Posted: Tue May 08, 2018 1:55 pm |
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| That sets the IVTBASE register. However it should be set correctly by default. Suggests some chips may have it set differently. |
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