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ciccioc74
Joined: 23 Mar 2010
Posts: 30
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| remap bootload problem (yet) |
 Posted: Wed Oct 10, 2018 2:56 am |
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Hello. Me too (like many people) I have a problem with the remapping for the bootloader.
I read dozens of posts but it still does not work so sorry  .
I installed the USB HID microchip bootloader and it seems to work fine (button, LED etc) but when I try to program the board with Microchip USB HID Bootloader v2.3 with my application the message "Program / Verify Failuate" appears. A bit of details:PIC18F25K50. The bootloader is written with Mplab C18 (which I modified for my card). Bootloader ends at 0xEBC. My program is written in Mplab Toolchain CCS (v5.015) and works (tested without remap). I include the file
| Code: | | #include "USB_BOOTLOADER.H" |
I tried different configurations for USB_BOOTLOADER.H
rev 1:
| Code: |
///////////////////////////////////////////////////////////////////////////
//// USB_BOOTLOADER.H ////
//// ////
//// ////
///////////////////////////////////////////////////////////////////////////
//how big is the bootloader?
//the bootloader will reside from address 0x0000 to this location. the
//application will then sit at this location+1 to the end of program memory.
#define LOADER_SIZE (0xFFF)
#define LOADER_START (0)
#define LOADER_END (LOADER_SIZE)
#define APPLICATION_START (LOADER_SIZE+1)
#define APPLICATION_END (getenv("PROGRAM_MEMORY")-1)
#define APPLICATION_ISR (APPLICATION_START+8)
//#ifndef _bootloader
//in the application, this moves the reset and isr vector out of the bootload
//space. it then reserves the loader space from being used by the application.
#build(reset=APPLICATION_START, interrupt=APPLICATION_ISR,Bootload )
// Line below not needed if bootloader is embedded to application, gives a warning
// #org 0, LOADER_END {}
//#endif
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rev 2:
| Code: |
///////////////////////////////////////////////////////////////////////////
//// ////
//// USB_BOOTLOADER.H ////
//// ////
//// This include file must be included by any application loaded ////
//// by the example USB bootloader (ex_usb_bootloader ////
//// ////
//// The directives in this file relocate the reset and interrupt ////
//// vectors as well as reserving space for the bootloader. ////
//// ////
//// For more documentation see ex_usb_bootloader.c ////
//// ////
///////////////////////////////////////////////////////////////////////////
//// ////
//// VERSION HISTORY ////
//// ////
//// July 9th, 2012: ////
//// Added support for PCD (see ex_usb_bootloader.c). ////
//// ////
//// March 5th, 2009: ////
//// Cleanup for Wizard. ////
//// PIC24 Initial release. ////
//// ////
///////////////////////////////////////////////////////////////////////////
//// (C) Copyright 1996,2009 Custom Computer Services ////
//// This source code may only be used by licensed users of the CCS ////
//// C compiler. This source code may only be distributed to other ////
//// licensed users of the CCS C compiler. No other use, ////
//// reproduction or distribution is permitted without written ////
//// permission. Derivative programs created using this software ////
//// in object code form are not restricted in any way. ////
///////////////////////////////////////////////////////////////////////////
#define LOADER_START (0)
#define LOADER_SIZE (0x0FFF)
#define APPLICATION_END (getenv("PROGRAM_MEMORY")-1)
#if defined(__PCM__)
#define LOADER_END (LOADER_SIZE+0x40-1)
#elif defined(__PCH__)
#define FLASH_SIZE getenv("FLASH_ERASE_SIZE")
#if (((LOADER_SIZE) % FLASH_SIZE) == 0 ) //IF LOADER_SIZE is even flash boundary
#define LOADER_END (LOADER_SIZE-1)
#else //ELSE, goto next even boundary
#define LOADER_END (((LOADER_SIZE)+FLASH_SIZE-((LOADER_SIZE)%FLASH_SIZE))-1)
#endif
#endif
#define APPLICATION_START (LOADER_END+1)
#define APPLICATION_ISR (APPLICATION_START+8)
//// --- end configuration --- ////////////////////////////////////////////
//in the application, this moves the reset and isr vector out of the bootload
//space. it then reserves the loader space from being used by the application.
#build(reset=APPLICATION_START, interrupt=APPLICATION_ISR)
#build(Bootload)
#org 0, LOADER_END {}
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Ttelmah
Joined: 11 Mar 2010
Posts: 19535
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| Posted: Wed Oct 10, 2018 3:34 am |
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The standard file modified for a 0xFFF bootloader is:
| Code: |
#define LOADER_START (0)
#define LOADER_SIZE (0x1000)
#define LOADER_END (LOADER_SIZE-1)
#define APPLICATION_START LOADER_SIZE
#define APPLICATION_ISR (APPLICATION_START+8)
// bytes per address
#if defined(__PCH__)
#define _LOADER_BPA 1
#else //PCM and PCD
#define _LOADER_BPA 2
#endif
#define _LOADER_FIND_PAGE_START(address) ((__ADDRESS__)address & ~(((__ADDRESS__)getenv("FLASH_ERASE_SIZE")/_LOADER_BPA)-(__ADDRESS__)1))
// total size of program memory of this controller, including config bits. this value is in instructions (NOT BYTES)
#if (_LOADER_FIND_PAGE_START(getenv("PROGRAM_MEMORY")) != getenv("PROGRAM_MEMORY"))
#define _LOADER_CONFIG_BITS_IN_ROM 1
#define _LOADER_CONFIG_BITS_PAGE_ADDRESS _LOADER_FIND_PAGE_START(getenv("PROGRAM_MEMORY"))
#else
#define _LOADER_CONFIG_BITS_IN_ROM 0
#endif
#ifndef _bootloader
//in the application, this moves the reset and isr vector out of the bootload
//space. it then reserves the loader space from being used by the application.
#build(reset=APPLICATION_START, interrupt=APPLICATION_ISR)
#org 0, LOADER_END {}
#if ((_LOADER_CONFIG_BITS_IN_ROM==1) && !defined(USB_BOOTLOADER_CONFIG_BITS_WRITABLE))
// the page containing the config bits is usually write protected.
// so prevent the application from using this page.
#org _LOADER_CONFIG_BITS_PAGE_ADDRESS,getenv("PROGRAM_MEMORY")-1 {}
#endif
#endif
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I 'm not sure the current code will correctly give the size and end. |
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Ttelmah
Joined: 11 Mar 2010
Posts: 19535
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| Posted: Wed Oct 10, 2018 8:15 am |
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| As a further comment, you should also be building the loadable application, with #fuses NONE. The bootloader can't change the fuses and if it is attempting to write these it could give the error being reported. The CCS one just ignores the fuse area. |
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ciccioc74
Joined: 23 Mar 2010
Posts: 30
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| Nothing |
| Posted: Thu Oct 11, 2018 3:37 am |
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I created a dummy program (blink led) in ccs (without MPLAB) with the same fuses of bootloader
| Code: |
#include <18LF25K50.h>
#FUSES PLL3X
#FUSES NOCPUDIV
#FUSES LS48MHZ
#FUSES INTRC_IO
#FUSES NOWDT //No Watch Dog Timer
#FUSES WDT128 //Watch Dog Timer uses 1:128 Postscale
#FUSES NOBROWNOUT //No brownout reset
#FUSES NOLVP //No low voltage prgming, B3(PIC16) or B5(PIC18) used for I/O
#FUSES NOXINST //Extended set extension and Indexed Addressing mode disabled (Legacy mode)
#FUSES CCP2C1 //ccp pwm su c1
#use delay(clock=48000000,USB_FULL)
//#use pwm(CCP2,TIMER=2,FREQUENCY=2000,DUTY=50)
#use FIXED_IO( A_outputs=PIN_A5,PIN_A4,PIN_A3 )
#define LED PIN_A3
#define DELAY 500
void main()
{
//Example blinking LED program
while(true)
{
output_low(LED);
delay_ms(DELAY);
output_high(LED);
delay_ms(DELAY);
}
}
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works fine
then I added the remap and loaded the program with the bootloader.
| Code: |
#FUSES NONE
#define LOADER_START (0)
#define LOADER_SIZE (0x1000)
#define LOADER_END (LOADER_SIZE-1)
#define APPLICATION_START LOADER_SIZE
#define APPLICATION_ISR (APPLICATION_START+8)
// bytes per address
#if defined(__PCH__)
#define _LOADER_BPA 1
#else //PCM and PCD
#define _LOADER_BPA 2
#endif
#define _LOADER_FIND_PAGE_START(address) ((__ADDRESS__)address & ~(((__ADDRESS__)getenv("FLASH_ERASE_SIZE")/_LOADER_BPA)-(__ADDRESS__)1))
// total size of program memory of this controller, including config bits. this value is in instructions (NOT BYTES)
#if (_LOADER_FIND_PAGE_START(getenv("PROGRAM_MEMORY")) != getenv("PROGRAM_MEMORY"))
#define _LOADER_CONFIG_BITS_IN_ROM 1
#define _LOADER_CONFIG_BITS_PAGE_ADDRESS _LOADER_FIND_PAGE_START(getenv("PROGRAM_MEMORY"))
#else
#define _LOADER_CONFIG_BITS_IN_ROM 0
#endif
#ifndef _bootloader
//in the application, this moves the reset and isr vector out of the bootload
//space. it then reserves the loader space from being used by the application.
#build(reset=APPLICATION_START, interrupt=APPLICATION_ISR)
#org 0, LOADER_END {}
#if ((_LOADER_CONFIG_BITS_IN_ROM==1) && !defined(USB_BOOTLOADER_CONFIG_BITS_WRITABLE))
// the page containing the config bits is usually write protected.
// so prevent the application from using this page.
#org _LOADER_CONFIG_BITS_PAGE_ADDRESS,getenv("PROGRAM_MEMORY")-1 {}
#endif
#endif
void main()
{
//Example blinking LED program
while(true)
{
output_low(LED);
delay_ms(DELAY);
output_high(LED);
delay_ms(DELAY);
}
}
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Program/Verify Failure ... It does not work yet
also I add the FUSES of the bootloader in C18 (even if they are off topic )
| Code: |
// CONFIG1L
#pragma config PLLSEL = PLL3X // PLL Selection (3x clock multiplier)
#pragma config CFGPLLEN = OFF // PLL Enable Configuration bit (PLL Disabled (firmware controlled))
#pragma config CPUDIV = NOCLKDIV// CPU System Clock Postscaler (CPU uses system clock (no divide))
#pragma config LS48MHZ = SYS48X8// Low Speed USB mode with 48 MHz system clock (System clock at 48 MHz, USB clock divider is set to 8)
// CONFIG1H
#pragma config FOSC = INTOSCIO // Oscillator Selection (Internal oscillator)
#pragma config PCLKEN = ON // Primary Oscillator Shutdown (Primary oscillator enabled)
#pragma config FCMEN = ON // Fail-Safe Clock Monitor (Fail-Safe Clock Monitor enabled)
#pragma config IESO = ON // Internal/External Oscillator Switchover (Oscillator Switchover mode enabled)
// CONFIG2L
#pragma config nPWRTEN = ON // Power-up Timer Enable (Power up timer enabled)
#pragma config BOREN = SBORDIS // Brown-out Reset Enable (BOR enabled in hardware (SBOREN is ignored))
// #pragma config BORV = 2V5 // Brown-out Reset Voltage (BOR set to 1.9V nominal)
#pragma config nLPBOR = ON // Low-Power Brown-out Reset (Low-Power Brown-out Reset enabled)
// CONFIG2H
#pragma config WDTEN = OFF // Watchdog Timer Enable bits (WDT disabled in hardware (SWDTEN ignored))
#pragma config WDTPS = 32768 // Watchdog Timer Postscaler (1:32768)
// CONFIG3H
#pragma config CCP2MX = RC1 // CCP2 MUX bit (CCP2 input/output is multiplexed with RC1)
#pragma config PBADEN = ON // PORTB A/D Enable bit (PORTB<5:0> pins are configured as analog input channels on Reset)
#pragma config T3CMX = RC0 // Timer3 Clock Input MUX bit (T3CKI function is on RC0)
#pragma config SDOMX = RB3 // SDO Output MUX bit (SDO function is on RB3)
#pragma config MCLRE = OFF // Master Clear Reset Pin Enable (RE3 input pin enabled; external MCLR disabled)
// CONFIG4L
#pragma config STVREN = OFF // Stack Full/Underflow Reset (Stack full/underflow will not cause Reset)
#pragma config LVP = OFF // Single-Supply ICSP Enable bit (Single-Supply ICSP disabled)
#pragma config XINST = OFF // Extended Instruction Set Enable bit (Instruction set extension and Indexed Addressing mode disabled)
// CONFIG5L
#pragma config CP0 = OFF // Block 0 Code Protect (Block 0 is not code-protected)
#pragma config CP1 = OFF // Block 1 Code Protect (Block 1 is not code-protected)
#pragma config CP2 = OFF // Block 2 Code Protect (Block 2 is not code-protected)
#pragma config CP3 = OFF // Block 3 Code Protect (Block 3 is not code-protected)
// CONFIG5H
#pragma config CPB = OFF // Boot Block Code Protect (Boot block is not code-protected)
#pragma config CPD = OFF // Data EEPROM Code Protect (Data EEPROM is not code-protected)
// CONFIG6L
#pragma config WRT0 = OFF // Block 0 Write Protect (Block 0 (0800-1FFFh) is not write-protected)
#pragma config WRT1 = OFF // Block 1 Write Protect (Block 1 (2000-3FFFh) is not write-protected)
#pragma config WRT2 = OFF // Block 2 Write Protect (Block 2 (04000-5FFFh) is not write-protected)
#pragma config WRT3 = OFF // Block 3 Write Protect (Block 3 (06000-7FFFh) is not write-protected)
// CONFIG6H
#pragma config WRTC = OFF // Configuration Registers Write Protect (Configuration registers (300000-3000FFh) are not write-protected)
#pragma config WRTB = OFF // Boot Block Write Protect (Boot block (0000-7FFh) is not write-protected)
#pragma config WRTD = OFF // Data EEPROM Write Protect (Data EEPROM is not write-protected)
// CONFIG7L
#pragma config EBTR0 = OFF // Block 0 Table Read Protect (Block 0 is not protected from table reads executed in other blocks)
#pragma config EBTR1 = OFF // Block 1 Table Read Protect (Block 1 is not protected from table reads executed in other blocks)
#pragma config EBTR2 = OFF // Block 2 Table Read Protect (Block 2 is not protected from table reads executed in other blocks)
#pragma config EBTR3 = OFF // Block 3 Table Read Protect (Block 3 is not protected from table reads executed in other blocks)
// CONFIG7H
#pragma config EBTRB = OFF // Boot Block Table Read Protect (Boot block is not protected from table reads executed in other blocks)
#else
#error Not a supported board (yet), make sure the proper board is selected in usbcfg.h, and if so, set configuration bits in __FILE__, line __LINE__
#endif
/** V A R I A B L E S ********************************************************/
#pragma udata |
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Ttelmah
Joined: 11 Mar 2010
Posts: 19535
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| Posted: Thu Oct 11, 2018 4:01 am |
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First, describe your hardware.
Have you actually tested USB with the device?.
Then consider reading the chip back after the failure, and comparing the memory from 0x1000 upwards with what the bootloader should have programmed. Finding out where it is failing could be a very useful diagnostic.
Microchip did have a basic application to test with the bootloader. Does this load?. |
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ciccioc74
Joined: 23 Mar 2010
Posts: 30
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| Posted: Mon Oct 15, 2018 9:10 am |
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Hardware looks ok. The device is recognized by the USB. If I press the button on Port C0 the device enters Bootloader mode and 2 LEDs start flashing to signal it.
The board has an 18f25k50 IML at 5V, powered by the USB. (but I also tried from the power supply) the USB connector has 5 pins (micro B Vert) 5V, D-, D +, NC, GND. I connected D+ to pin 13 of the micro and D- to pin 12. there is a 300nF capacitor on Pin 11. The micro has an 8MHz quartz but at this moment I'm using the version of the Bootloader with internal oscillator. When I read the micro with a Pickit there is nothing beyond the address 0x1000. The file is not loaded. I attach the 2 HEX and the one with the blink without remapping:
SCHEMATIC https://1drv.ms/u/s!Aj77-kvgWietnO00ozkDaxc_B62J7w
BOOTLOADER https://1drv.ms/u/s!Aj77-kvgWietnO01dhomR3wpcd3wjw
SOURCE NO REMAP https://1drv.ms/u/s!Aj77-kvgWietnO04rHLBXNmLTi6Tmw
SOURCE REMAP https://1drv.ms/u/s!Aj77-kvgWietnO056tqDVJqp5LhNkg |
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Ttelmah
Joined: 11 Mar 2010
Posts: 19535
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| Posted: Mon Oct 15, 2018 10:36 am |
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Being 'recognised' does not guarantee that the USB is actually going to reliably work. You need to run a basic test environment and verify the USB is working before trying to run the bootloader.
It is honestly behaving as if the USB connection is not reliably working.
If you have a crystal, your bootloader should be using it. Rememeber the bootloader fuses must match the application fuses, if the application is going to work, so if the application wants to use a crystal, the bootloader needs to do the same. To run full speed USB from the internal oscillator, ACT needs to be enabled, or there will be data errors after only a few bytes typically. |
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ciccioc74
Joined: 23 Mar 2010
Posts: 30
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| Posted: Tue Oct 16, 2018 1:05 am |
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Thanks for the answers. You are very kind.
Ok, for ACT you mean the ACTCON register? The C18 does not recognize it. How do you define the registry (in CCS do #byte ACTCON = 0xFB5) in C18? |
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temtronic
Joined: 01 Jul 2010
Posts: 9241
Location: Greensville,Ontario
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| Posted: Tue Oct 16, 2018 6:48 am |
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1) Have to agree, again, with Mr. T. For stable, reliable USB the PIC needs a real crystral. While I don't use that PIC, I had one here that did run OK on the bench with the internal osc UNTIL it got into the real World and got cold. The drop in temperature was just enough for the speed to go out of spec for USB. A crystal and 2 caps solved that gremlin.
2) This is a CCS forum, for C18 info, you really need to find a C18 forum. After 2+ decades of using CCS C, I have no need to 'jump ship'.
Jay |
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Ttelmah
Joined: 11 Mar 2010
Posts: 19535
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| Posted: Tue Oct 16, 2018 7:28 am |
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ACT = Active Clock Tuning.
Phase locks the internal oscillator to the incoming USB. This is required since the internal oscillator is not accurate enough to actually meet the USB timings. Without this data will be corrupted.
On CCS you just add this to the #USE DELAY statement (ACT=USB), and it then syncs the internal clock to the incoming USB. |
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