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RaptorUK
Joined: 30 Apr 2019 Posts: 17
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Posted: Thu May 09, 2019 8:50 am |
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Ttelmah wrote: | Think about it. . |
OK, I have, thanks for persevering with me . . .
I've changed the code and now I'm not getting the Status data, but I'm pretty sure I know why, the 9bit going low may signify the end of the data stream not the start.
I can rework my code to address this and test again. |
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RaptorUK
Joined: 30 Apr 2019 Posts: 17
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Posted: Thu May 16, 2019 2:18 am |
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A quick update . . .
I modified my RD interrupt to read the data before checking for the 9th bit, this is now working correctly, I've confirmed that the 9th bit being low does actually signify the start of the data stream, I'm confident that this part of my code is now working well.
I ended up routing the comms through a relay to disable it when it wasn't needed, this has helped to the point that I can now complete a full sequence most of the time.
I had some I2C issues, my data transfer to the EEPROM would consistently fail with 42 pages left to write, I spent a day checking my code adding flashing LEDs here and there to find where things were locking up . . . it mad no sense, in the end I unlooped my SDA and SCL wires and my problem went away, I'll replace these wires with some twin core shielded cable in due course. I'll also rewire my comms cable with shielded wire.
Thanks again for the help. |
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Ttelmah
Joined: 11 Mar 2010 Posts: 19538
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Posted: Thu May 16, 2019 2:29 am |
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Well done. Glad you have it working.
Wiring, when handling signals that are reasonably 'fast', can be much more
important than many realise.
When you say 'twin core', remember that normal 'microphone' twin core
does not provide shielding between the cores, and if the distance is more than
a very few inches, termination should really be used... |
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