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newguy
Joined: 24 Jun 2004
Posts: 1909
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| ADC speed? |
 Posted: Fri Aug 06, 2004 11:13 am |
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Hi all,
Stupid question: how fast does an A/D conversion occur on, say, an 18F452? I've read through the data sheet, but I'm still a little unclear.
I have an application where I'm sampling 2 channel audio, 8 bits each, and I'd like to do so as quickly as possible. A sampling rate of 44 kHz would be nice, but not totally necessary. I could get away with a 30 kHz rate, or even 10 kHz in a pinch, as the audio I'm sampling doesn't have spectral components above about 3 kHz (no, it's not voice). In an ideal world, both channels would be sampled simultaneously, but I realize that isn't possible.
It's okay if both channels aren't sampled at exactly the same time, provided that I know exactly when each was sampled.
In the 18Fxx2 data sheet, pages 185-187, it says that the acquisition time is approx 13 us. So this is the time between when you set the adc channel and when the channel is ready to be read, right?
Then it says that a 10 bit acquisition takes approximately 12 adc clock cycles to complete. Would I be correct in assuming that an 8 bit acquistion would take 10 cycles, or is it always 12?
So if I ran the 18F452 at 40 MHz, and set the ADC's clock to osc/64, that gives me a 1.6 us adc clock, the quickest it can run. If a conversion takes 12 clock cycles, that's 19.2 us, plus the 13 or so for the acquisition time prior to sampling. Is this correct? So then sampling of one channel would take about 32 us, right? Therefore the fastest I could sample 2 channels would be every 64 us, right? |
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PCM programmer
Joined: 06 Sep 2003
Posts: 21708
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| Posted: Fri Aug 06, 2004 12:44 pm |
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Look at the reference manual for A/D converters for the PIC18 series.
http://ww1.microchip.com/downloads/en/DeviceDoc/39526.pdf
In Example 26-1 and 26-2 they show how to calculate the acquisition
time.
Then in Example 26-4, they have a chart which shows the conversion
time for 10-bit resolution with a 1.6 us Tad (with a 40 MHz Fosc).
If you add up their calculated values for Taq and Conversion time,
it's roughly 30 us. |
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Ttelmah
Guest
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| Re: ADC speed? |
| Posted: Fri Aug 06, 2004 2:53 pm |
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| newguy wrote: | Hi all,
Stupid question: how fast does an A/D conversion occur on, say, an 18F452? I've read through the data sheet, but I'm still a little unclear.
I have an application where I'm sampling 2 channel audio, 8 bits each, and I'd like to do so as quickly as possible. A sampling rate of 44 kHz would be nice, but not totally necessary. I could get away with a 30 kHz rate, or even 10 kHz in a pinch, as the audio I'm sampling doesn't have spectral components above about 3 kHz (no, it's not voice). In an ideal world, both channels would be sampled simultaneously, but I realize that isn't possible.
It's okay if both channels aren't sampled at exactly the same time, provided that I know exactly when each was sampled.
In the 18Fxx2 data sheet, pages 185-187, it says that the acquisition time is approx 13 us. So this is the time between when you set the adc channel and when the channel is ready to be read, right?
Then it says that a 10 bit acquisition takes approximately 12 adc clock cycles to complete. Would I be correct in assuming that an 8 bit acquistion would take 10 cycles, or is it always 12?
So if I ran the 18F452 at 40 MHz, and set the ADC's clock to osc/64, that gives me a 1.6 us adc clock, the quickest it can run. If a conversion takes 12 clock cycles, that's 19.2 us, plus the 13 or so for the acquisition time prior to sampling. Is this correct? So then sampling of one channel would take about 32 us, right? Therefore the fastest I could sample 2 channels would be every 64 us, right? |
Unfortunately, your problem will be the multiplexer charge time, rather than the sampling speed.
Basically, the sampler uses a capacitor inside the chip. If you have a low impedance drive, the voltage on this does not lag the signal too badly, but gets worse as the frequency rises. The actual 'reading', can then be done in as little as about 10uSec. The problem is that that if the signal itself is changing quickly, the internal resistance of the multiplexor, and the capacitor size, will limit the maximum frequency of the circuit as a whole (rather than the sampling rate). Then when you change channels, the same resistance and capacitance, imposes an even longer charge time (assuming that the two signals might be at very different voltages). The recommended time to allow a signal to fully charge, will depend on your source impedance. The internal resistance of the multiplexor switch varies with the supply voltage, but is typically about 7K. The internal capacitance is 120pF. If you accept lower accuracy than the ADC is potentially capable of, you can sample sooner after a switch, but realistically, anything btter than perhaps a couple of _mSec_ after switching, is not even worth considering.
You can't really sample dual channel audio with the inbuilt ADC I'm afraid. Consider either using a second chip, and make each just operate on a single channel (even with this, the upper frequency will be significantly limited), or look at a faster low accuracy external ADC for this application.
Best Wishes |
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